Part Number Hot Search : 
2DMK20 UF100 ANSR2N7 LTM4606V KRC857U JHA010 CSL07 5KE110
Product Description
Full Text Search
 

To Download HI-1581 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  vdda 1 busa 2 3 rxena 4 gnda 5 vddb 6 busb 7 8 rxenb 9 gndb 10 busa busb 20 19 txa 18 txinha 17 rxa 16 15 14 txb 13 txinhb 12 rxb 11 txa rxa txb rxb 1579cdi 1579cdt 1579cdm 1581cdi 1581cdt 1581cdm hi-1579, HI-1581 mil-std-1553 / 1760 3.3v monolithic dual transceivers description features the hi-1579 and HI-1581 are low power cmos dual transceivers designed to meet the requirements of the mil-std-1553 and mil-std-1760 specifications. the receiver section of the each bus converts the 1553 bus bi-phase data to complementary cmos / ttl data suitable for input to a manchester decoder. each receiver has a separate enable input, which forces the receiver outputs to logic "0" (hi-1579) or logic 1 (HI-1581). to minimize the package size for this function, the transmitter outputs are internally connected to the receiver inputs, so that only two pins are required for connection to each coupling transformer. the transmitter section of each bus takes complementary cmos / ttl manchester ii bi-phase data and converts it to differential voltages suitable for driving the bus isolation transformer. separate transmitter inhibit control signals are provided for each transmitter.       compliant to mil-std-1553a and b, mil-std-1760 and arinc 708a 3.3v single supply operation smallest footprint available in 7mm x 7mm 44 pin plastic chip-scale package (qfn) 1.0w typical power dissipation (50% duty cycle) industrial and extended temperature ranges industry standard pin configurations may 2013 (ds1579 rev. k) 05/13 20 pin ceramic dip package 20 pin plastic esoic - wb package pin configurations pin configurations 44 - 43 42 41 busa 40 busa 39 vdda 38 vdda 37 36 txa 35 - 34 - busa busa txa -1 rxena 2 gnda 3 gnda 4 gnda 5 vddb 6 vddb 7 busb 8 busb 9 10 11 busb busb 33 - 32 - 31 txinha 30 rxa 29 28 - 27 - 26 25 txb 24 txinhb 23 - rxa txb -12 -13 -14 -15 rxenb 16 gndb 17 gndb 18 gndb 19 20 rxb 21 -22 rxb 1579pci 1579pct 1579pcm 1581pci 1581pct 1581pcm 44 pin plastic 7mm x 7mm chip-scale package 1579psi 1579pst 1579psm 1581psi 1581pst 1581psm 1 busa 2 3 rxena 4 gnda 5 vddb 6 busb 7 8 rxenb 9 gndb 10 vdda busa busb 20 19 txa 18 txinha 17 rxa 16 15 14 txb 13 txinhb 12 rxb 11 txa rxa txb rxb holt integrated circuits www.holtic.com
pin descriptions functional description the hi-1579 family of dual data bus transceivers contains differential voltage source drivers and differential receiv- ers. it is intended for applications using a mil-std-1553 a/b data bus. the device produces a trapezoidal output waveform during transmission. data input to the device?s transmitter section is from the complementary cmos inputs txa/b and / . the transmitter accepts manchester ii bi-phase data and con- verts it to differential voltages on . the transceiver outputs are either direct- or transformer- coupled to the mil-std-1553 data bus. both coupling methods produce a nominal voltage on the bus of 7.5 volts peak to peak. transmitter txa b busa/b and / the transmitter is automatically inhibited and placed in the high impedance state when both txa/b and / are driven with the same logic state. a logic ?1? applied to the txinha/b input forces the transmitter to the high imped- ance state, regardless of the state of txa/b and / the receiver accepts bi-phase differential data from the mil-std-1553 bus through the same direct- or trans- former- coupled interface as the transmitter. the re- ceiver?s differential input stage drives a filter and threshold busa b txa b txa b. receiver hi-1579, HI-1581 pin symbol function description (dip & soic) 1 vdda power supply +3.3 volt power for transceiver a 2 busa analog output mil-std-1533 bus driver a, positive signal 3 analog output mil-std-1553 bus driver a, negative signal 4 rxena digital input receiver a enable. if low, forces rxa and low 5 gnda power supply ground for transceiver a 6 vddb 7 busb 9 rxenb 10 gndb 11 12 rxb digital output receiver b output, non-inverted 13 txinhb digital input transmit inhibit, bus b. if high busb, disabled 14 txb digital input transmitter b digital data input, non-inverted 15 digital input transmitter b digital data input, inverted 16 digital output busa rxa busb txb rxa power supply +3.3 volt power for transceiver b analog output mil-std-1533 bus driver b, positive signal 8 analog output mil-std-1553 bus driver b, negative signal digital input receiver b enable. if low, forces rxb and low power supply ground for transceiver b digital output receiver b output, inverted receiver a output, inverted 17 rxa digital output receiver a output, non-inverted 18 txinha digital input transmit inhibit, bus a. if high busa, disabled 19 txa digital input transmitter a digital data input, non-inverted 20 digital input transmitter a digital data input, inverted busb rxb rxb busa txa comparator to produce cmos data at the rxa/b and / output pins. when the mil-std-1553 bus is idle and rxena or rxenb are high, rxa/b will be logic ?0? on hi-1579 and logic ?1? on HI-1581. the receiver outputs are forced to the bus idle state (logic "0? for hi-1579 or logic ?1? for HI-1581) when the rxena or rxenb is low. a direct-coupled interface (see figure 2) uses a 1:2.5 ratio isolation transformer and two 55 ohm isolation resistors between the transformer and the bus. the primary center-tap of the isolation transformer must be connected to gnd. in a transformer-coupled interface (see figure 2), the transceiver is also connected to a 1:2.5 isolation transformer which in turn is connected to a 1:1.4 coupling transformer. the transformer coupled method also requires two coupling resistors equal to 75% of the bus characteristic impedance (zo) between the coupling transformer and the bus. figure 3 and figure 4 show test circuits for measuring electrical characteristics of both direct- and transformer- coupled interfaces respectively. (see electrical characteristics on the following pages). rxa b mil-std-1553 bus interface holt integrated circuits 2
receive waveforms - example pattern transmit waveform - example pattern txa/b txa/b busa/b - busa/b figure 1. block diagram txa/b txa/b txinha/b rxa/b rxa/b rxena/b each bus transmit logic receive logic slope control comparator input filter busa/b busa/b transmitter receiver data bus isolation transformer coupler network direct or transformer hi-1579, HI-1581 holt integrated circuits 3 rxa/b (hi-1579) rxa/b (hi-1579) vin (line to line) t dr t dr t rg t dr t rg t dr t rg t rg rxa/b (HI-1581) rxa/b (HI-1581)
v = 3.3 v, gnd = 0v, t = operating temperature range (unless otherwise specified). dd a dc electrical characteristics supply voltage temperature range industrial ........................ -40c to +85c hi-temp ....................... -55c to +125c v ....................................... 3.3v... 5% dd note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. supply voltage ( logic input voltage range power dissipation at 25c 1.0 w ceramic dil, derate 7mw/c solder temperature 275c for 10 sec. junction temperature 175c storage temperature -65c to +150c v ) -0.3vto+5v -0.3 v dc to +3.6 v receiver differential voltage 50 vp-p driver peak output current +1.0 a dd recommended operating conditions absolute maximum ratings hi-1579, HI-1581 parameter symbol condition min typ max units operating voltage v 3.15 3.30 3.45 v total supply current i not transmitting 4 17 ma i transmit one bus @ 225 320 ma 50% duty cycle i transmit one bus @ ma 100% duty cycle power dissipation pd not transmitting 0.06 w pd transmit one bus @ 0.5 1.0 w 100% duty cycle min. input voltage (hi) v digital inputs 70% v max. input voltage (lo) v digital inputs 30% v min. input current (hi) i digital inputs 20 a max. input current (lo) i digital inputs -20 a min. output voltage (hi) v i = -1.0ma, digital outputs 90% v max. output voltage (lo) v i = 1.0ma, digital outputs 10% v dd cc1 cc2 cc3 1 2 425 640 input resistance r differential (at chip pins) 2 kohm input capacitance c differential 5 pf common mode rejection ratio cmrr 40 db input level v differential 9 vp-p input common mode voltage v -10.0 10.0 v-pk threshold voltage - direct-coupled detect v 1 mhz sine wave 1.15 vp-p measured at point ?a ? in figure 2 rxa/b, pulse width >70 ns no detect v no pulse at rxa/b, 0.28 vp-p theshold voltage - transformer-coupled detect v 1 mhz sine wave 0.86 vp-p measured at point ?a ? in figure 3 rxa/b, pulse width >70 ns no detect v no pulse at rxa/b, 0.20 vp-p ih il ih il oh out ih out d dd dd dd dd receiver (measured at point ?a ? in figure 2 unless otherwise specified) in in in icm thd thd d rxa/b rxa/b rxa/b rxa/b thnd thnd t holt integrated circuits 4
parameter symbol test conditions min typ max units driver delay t txa/b, txa/b to busa/b, busa/b 150 ns rise time tr 35 ohm load 100 300 ns fall time tf 35 ohm load 100 300 ns inhibit delay t inhibited output 100 ns t active output 150 ns receiver transmitter (measured at point ?a ? in figure 2 unless otherwise specified) (measured at point ?a ? in figure 2) d d receiver delay t from input zero crossing to rxa/b 450 ns or receiver gap time t spacing between rxa/b 90 365 ns and pulses. 1 mhz sine wave applied at point ?at? figure 3, amplitude range 0.86 vp-p to 27.0vp-p receiver enable delay t from strobe rising or falling edge to 40 ns rxa/b or dr rg ren rxa/b rxa/b rxa/b dt di-h di-l v = 3.3 v, gnd = 0v, t =operating temperature range (unless otherwise specified). dd a ac electrical characteristics v = 3.3 v, gnd = 0v, t = operating temperature range (unless otherwise specified). dd a dc electrical characteristics (cont.) hi-1579, HI-1581 parameter symbol condition min typ max units output voltage direct coupled 35 ohm load 6.1 9.0 vp-p (measured at point ?a ? in figure 2) 70 20.0 27.0 vp-p output noise v differential, inhibited 10.0 mvp-p output dynamic offset voltage v -90 90 mv -250 250 mv output capacitance c 1 mhz sine wave 15 pf transmitter (measured at point ?a ? in figure 2 unless otherwise specified) d d v transformer coupled v ohm load (measured at point ?a ? in figure 3) direct coupled 35 ohm load (measured at point ?a ? in figure 2) transformer coupled v 70 ohm load (measured at point ?a ? in figure 3) out out dyn t d t on dyn out transceiver a transceiver b hi-1579 / HI-1581 mil-std-1553 stub coupler mil-std-1553 bus a (direct coupled) mil-std-1553 bus b (transformer coupled) isolation transformer 52.5  55  bus b 52.5  55  bus b bus a bus a 1:1.4 1:2.5 1:2.5 isolation transformer figure 2. bus connection example using hi-1579 or HI-1581 holt integrated circuits 5
junction tem part number package style condition ? perature t =25c t =85c t =125c ja aaa hi-1579psi / t / m 20-pin thermally heat sink 54c/w 68c 130c 170c enhanced plastic unsoldered HI-1581psi / t /m heat sink 47c/w 63c 124c 165c soic ( esoic) soldered hi-1579cdi / t / m 20-pin ceramic socketed 62c/w 74c 136c 175c hi-1579cdi / t / m side-brazed hi-1579pci / t / m 44-plastic chip- heat sink 49c/w 65c 126c 166c HI-1581pci / t / m scale package (qfn) unsoldered data taken at vdd=3.3v, continuous transmission at 1mbit/s, single transmitter enabled. thermal characteristics heat sink esoic & chip-scale packages the hi-1579psi/t/m and use a 20-pin thermally enhanced soic package. these packages include a metal heat sink located on the bottom surface of the device. this heat sink may be soldered down to HI-1581psi/t/m the hi-1579pci/t/m and HI-1581pci/t/m use a plastic chip-scale package (qfn). the printed circuit board for optimum thermal dissipation. the heat sink is electrically isolated hi-1579, HI-1581 isolation transformer bus a/b bus a/b gnd rxa/b txa/b txa/b rxa/b v dd each bus mil-std-1553 transceiver  point ?at? 1:2.5 hi-1579 / HI-1581 figure 4. transformer coupled test circuit and may be soldered to any convenient power or ground plane. holt applications note an-500 provides circuit design notes regarding the use of holt's family of mil-std-1553 transceivers. layout considerations, as well as recommended interface and protection components are included. applications note isolation transformer bus a/b bus a/b gnd rxa/b txa/b txa/b rxa/b v dd each bus mil-std-1553 transceiver 55  35  55  point ?ad? 1:2.5 hi-1579 / HI-1581 figure 3. direct coupled test circuit holt integrated circuits 6
transformers. holt recommends premier magnetics parts as offering the best combination of electrical perfor- mance, low cost and small footprint. recommended transformers the hi-1579 and HI-1581 transceivers have been characterized for compliance with the electrical require- ments of mil-std-1553 when used with the following hi - (ceramic) 15xxcd x hi - (plastic) 15xx xx x x 1579 0 0 0 0 20 pin ceramic side brazed dip (20c) 1581 1 1 1 1 20 pin ceramic side brazed dip (20c) part rxena = 0 rxenb = 0 package number rxa rxb description rxa rxb part temperature burn lead number range flow in finish i -40c to +85c i no gold (pb-free, rohs compliant) t -55c to +125c t no gold (pb-free, rohs compliant) m -55c to +125c m yes tin / lead (sn / pb) solder 1579 0 0 0 0 1581 1 1 1 1 part rxena = 0 rxenb = 0 number rxa rxb rxa rxb part package number description pc 44 pin plastic chip-scale package qfn (44pcs) ps 20 pin plastic esoic, thermally enhanced wide soic w/heat sink (20hwe) part temperature burn number range flow in i -40c to +85c i no t -55c to +125c t no m -55c to +125c m yes part lead number finish blank tin / lead (sn / pb) solder f 100% matte tin (pb-free rohs compliant) ordering information hi-1579, HI-1581 holt integrated circuits 7 manufacturer part number application turns ratio dimensions premier magnetics pm-db2791s isolation single 1:2.5 .400 x .400 x .185 inches premier magnetics pm-db2756 isolation dual 1:2.5 .930 x .575 x .185 inches premier magnetics pm-db2702 stub coupling 1:1.4 .625 x .500 x .250 inches
revision history document rev. date description of change ds1579 f 07/24/09 correct typographical errors in package dimensions. clarified available temperature ranges. g 10/5/09 clarified status of rxa/b and / pins in bus idle state when rxena or rxenb are high (logic ?1?). clarified nomenclature of chip-scale package as qfn. added ?m? flow option for qfn package (?pcm? package option). updated datasheet to include HI-1581 variant. h 01/26/10 corrected dynamic current and power dissipation values. i 02/01/10 revised thermal characteristic table to correspond to correct dynamic currents and power dissipation values. j 08/18/10 revised dc electrical characteristics table to correspond to actual measured values. revised bus connection and test circuit diagrams. revised soic package standoff dimension. k 05/23/13 revised text in functional description to improve clarity. added more detail to ac timing parameter table. removed reference to non-preferred transformers updated package drawings.. rxa b hi-1579, HI-1581 holt integrated circuits 8
package dimensions 20-pin ceramic side-brazed dip inches (millimeters) package type: 20c bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) .017  .002 (.432  .051) .100 (2.54) .310  010 (7.874  .254) .125 (3.175) .050 typ. (1.270 typ.) .200 (5.080) 1.000  .010 (25.400  .254) .010   002/
.001 (.254  .051
.025) .300   010 (7.620  .254) .085  .009 (2.159  .229) bsc max min holt integrated circuits 9 20-pin plastic small outline (esoic) - wb (wide body, thermally enhanced) inches (millimeters) package type: 20hwe bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) detail a 0 to 8 .086 .005 (2.181 .131) bottom view top view .033 .017 (.835 .435) .008 .004 (.200 .100) .016 .004 (.419 .109) .050 (1.27) bsc see detail a .008 .005 (.215 .115) .407 (10.33) bsc .504 (12.80) bsc .295 (7.50) bsc .210 .015 (5.335 .385) .295 .015 (7.495 .385) electrically isolated heat sink pad on bottom of package connect to any ground or power plane for optimum thermal dissipation
package dimensions holt integrated circuits 10 44-pin plastic chip-scale package (qfn) package type: 44pcs bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) .216 .002 (5.50 .05) .016 .002 (0.40 .05) .010 (0.25) .020 (0.50) .008 (0.2) .039 (1.00) .276 (7.00) bsc .216 .002 (5.50 .05) typ typ bottom view top view bsc .276 (7.00) bsc max inches (millimeters) electrically isolated heat sink pad on bottom of package connect to any ground or power plane for optimum thermal dissipation


▲Up To Search▲   

 
Price & Availability of HI-1581

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X